How to configure the number of vector registers compile can use?

K1
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1

Dear developers,

Is it possible to configure the number of vector registers during compilation? Because I want to make some experiments where I can limit the number of vector registers the system can use. For instance, the clang++ has options like -ffixed-x9 to reserve the x9 register (AArch64/RISC-V only).

For the RISC-V K1 core, does it have the similar flags or options? Where can I find it?
Any materials about it would be appreciated.

Thanks

2
  1. If you just want to configure the number of registers, you can may use the option：riscv-v-register-bit-width-lmul；
  2. If you want to constrain certain vector registers， it seems that is not currently supported.
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Thank you for replying.